| CPC H10K 59/35 (2023.02) [H10K 50/15 (2023.02); H10K 50/16 (2023.02); H10K 50/171 (2023.02); H10K 50/818 (2023.02); H10K 59/122 (2023.02); H10K 59/12 (2023.02); H10K 59/80518 (2023.02); H10K 59/87 (2023.02); H10K 59/873 (2023.02); H10K 59/876 (2023.02)] | 12 Claims |

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1. A display device comprising:
a base layer, the base layer including a first emission region and a second emission region;
a circuit layer disposed on the base layer and including a plurality of transistors;
a first electrode disposed on the base layer;
a second electrode disposed on the first electrode and facing the first electrode;
a first organic layer disposed between the first electrode and the second electrode and disposed in the first emission region; and
a second organic layer disposed between the first electrode and the second electrode and disposed in the second emission region, wherein
the first organic layer comprises:
a first electron transport layer disposed on the first electrode;
a first auxiliary layer disposed on the first electron transport layer;
a first emission layer disposed on the first auxiliary layer and emitting first light;
a second auxiliary layer disposed on the first emission layer; and
a first hole transport layer disposed on the second auxiliary layer, and
the second organic layer comprises:
a second electron transport layer disposed on the first electrode;
a third auxiliary layer disposed on the second electron transport layer;
a second emission layer disposed on the third auxiliary layer and emitting second light having a wavelength different from a wavelength of the first light;
a fourth auxiliary layer disposed on the second emission layer; and
a second hole transport layer disposed on the fourth auxiliary layer; and
wherein each auxiliary layer includes a carrier transport layer, wherein
the first electrode is a reflective electrode,
the second electrode is a transflective electrode or a transmissive electrode, and
the first light and the second light are emitted in a direction from the first electrode to the second electrode,
the first electron transport layer is disposed closer to the circuit layer than the first hole transport layer in a direction perpendicular to an upper surface of the substrate,
the second electron transport layer is disposed closer to the circuit layer than the second hole transport layer in a direction perpendicular to an upper surface of the substrate,
at least one of the plurality of transistors is an NMOS transistor,
the first electrode is electrically connected to the NMOS transistor,
a thickness of the first organic layer is in a range of about 250 nm to about 290 nm,
a thickness of the second organic layer is in a range of about 210 nm to about 250 nm,
a thickness of the first auxiliary layer and a thickness of the third auxiliary layer are different from each other, and
a thickness of the second auxiliary layer and a thickness of the fourth auxiliary layer are different from each other.
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