US 12,356,816 B2
Display substrate and display apparatus
Lu Bai, Beijing (CN); Yang Zhou, Beijing (CN); Yi Qu, Beijing (CN); Junxiu Dai, Beijing (CN); Song Liu, Beijing (CN); and Tinghua Shang, Beijing (CN)
Assigned to Chengdu BOE Optoelectronics Technology Co., Ltd., Sichuan (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
Appl. No. 18/022,494
Filed by Chengdu BOE Optoelectronics Technology Co., Ltd., Sichuan (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
PCT Filed Apr. 29, 2022, PCT No. PCT/CN2022/090429
§ 371(c)(1), (2) Date Feb. 21, 2023,
PCT Pub. No. WO2023/206409, PCT Pub. Date Nov. 2, 2023.
Prior Publication US 2024/0268164 A1, Aug. 8, 2024
Int. Cl. H01L 27/32 (2006.01); G09G 3/3233 (2016.01); G11C 19/28 (2006.01); H10K 59/131 (2023.01)
CPC H10K 59/131 (2023.02) [G09G 3/3233 (2013.01); G11C 19/287 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0209 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A display substrate, comprising a display region and a non-display region, the display region comprises at least one rounded corner, the non-display region comprises a rounded corner region located on an outside of the rounded corner, the display substrate comprises a base substrate and a circuit structure layer disposed on the base substrate, the circuit structure layer comprises pixel circuits arranged in an array and located in the display region and a control drive circuit located in the non-display region, a pixel circuit comprises a reset transistor, the control drive circuit is configured to provide a drive signal to the reset transistor;
the circuit structure layer further comprises a plurality of reset output lines and a plurality of reset transfer lines located in the non-display region and disposed on a side of the control drive circuit close to the display region, a reset output line is disposed in a different layer from a reset transfer line, an extension direction of the reset output line and an extension direction of the reset transfer line intersect;
the reset output line is electrically connected with the control drive circuit and the reset transfer line, respectively, the reset transfer line is connected with the pixel circuit; and
an orthographic projection of at least one reset transfer line located in the rounded corner region on the base substrate is partially overlapped with an orthographic projection of the plurality of reset output lines on the base substrate;
wherein the circuit structure layer further comprises a reset connection line located in the non-display region and disposed on a side of the control drive circuit close to the display region, the reset connection line is disposed in a different layer from the reset output line, an extension direction of the reset connection line and an extension direction of the reset output line intersect, the pixel circuits arranged in the array comprise a plurality of reset signal lines;
the reset connection line is electrically connected with the reset transfer line and a reset signal line, respectively; and
at least one reset connection line located in the rounded corner region is partially overlapped with orthographic projections of the plurality of reset output lines on the base substrate.