| CPC H10H 20/825 (2025.01) [H10D 30/015 (2025.01); H10D 30/475 (2025.01); H10D 62/8503 (2025.01); H10H 20/01335 (2025.01); H10H 20/817 (2025.01); H10H 20/857 (2025.01); H10H 20/0364 (2025.01)] | 12 Claims |

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1. A semiconductor structure, comprising:
a first epitaxial layer disposed on a substrate;
a bonding layer disposed on the first epitaxial layer, wherein the bonding layer is provided with a first through-hole to expose the first epitaxial layer;
a silicon substrate disposed on a side of the bonding layer away from the first epitaxial layer, wherein the first epitaxial layer is bonded to the silicon substrate by the bonding layer, the silicon substrate is provided with a through-silicon-via, and the through-silicon-via communicates with the first through-hole;
a silicon device disposed on the silicon substrate; and
a second epitaxial layer disposed on the first epitaxial layer that is exposed by the first through-hole;
wherein the first through-hole and the through-silicon-via are fully filled with the second epitaxial layer, and a III-V semiconductor device is formed on the second epitaxial layer;
wherein the III-V semiconductor device is a light emitting diode (LED) or high electron mobility transistor (HEMT);
wherein the III-V semiconductor device is electrically connected to the silicon device through a metal interconnection member.
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