| CPC H10D 86/60 (2025.01) [H10D 30/6723 (2025.01); H10D 30/6757 (2025.01); H10D 86/421 (2025.01)] | 17 Claims |

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1. A semiconductor device, comprising:
an insulating substrate; and
a thin film transistor layer disposed on the insulating substrate, wherein the thin film transistor layer comprises a first active layer disposed on the insulating substrate and a first insulating layer disposed on the first active layer, and a convex portion is formed on the first insulating layer; and
wherein the thin film transistor layer further comprises a second active layer and a third active layer disposed on two sidewalls and an upper surface of the convex portion, one end of the first active layer is connected to the second active layer, and another end of the first active layer is connected to the third active layer;
wherein the thin film transistor layer comprises a first metal layer positioned on a side of the first insulating layer away from the insulating substrate, and wherein in a direction perpendicular to the insulating substrate, the first metal layer covers the first active layer, the second active layer, and the third active layer;
wherein the thin film transistor layer comprises a second insulating layer positioned between the first metal layer and the first insulating layer, wherein in a direction perpendicular to the insulating substrate, the second insulating layer covers the first active layer, the second active layer, and the third active layer; and
wherein on the upper surface of the convex portion, the second insulating layer is defined with a groove positioned between the second active layer and the third active layer, and the first metal layer fills the groove.
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