| CPC H10D 84/856 (2025.01) [H10D 64/517 (2025.01); H10D 64/667 (2025.01); H10D 84/0135 (2025.01); H10D 84/014 (2025.01); H10D 84/85 (2025.01); H10D 84/853 (2025.01); H10D 89/10 (2025.01)] | 20 Claims |
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1. An integrated circuit device, comprising:
a substrate;
a plurality of active regions for a first type of transistor formed in the substrate, wherein the active regions include channel regions and source/drain regions for the first type of transistor, and wherein the active regions are oriented in rows along a first direction in a horizontal dimension relative to the substrate;
a gate structure formed above the substrate in a vertical dimension relative to the substrate, wherein the gate structure is oriented in a column along a second direction in the horizontal dimension, the second direction being perpendicular to the first direction, wherein the gate structure is positioned above at least two rows of active regions in the vertical dimension, and wherein the gate structure includes:
a first section of the gate structure positioned above a first active region of the at least two rows of active regions in the vertical dimension, the first section including a first metal gate material, wherein the first metal gate material is associated with an active transistor of the first type of transistor and has a first work function; and
a second section of the gate structure positioned above a second active region of the at least two rows of active regions in the vertical dimension, wherein the second section includes a second metal gate material, the second metal gate material in second section being adjacent to the first metal gate material in first section, wherein the second metal gate material has a second work function that is different than the first work function, and wherein the second gate material in the second section being adjacent to the first gate material in the first section induces a shift in a threshold voltage of the active transistor.
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