| CPC H10D 62/151 (2025.01) [H10D 64/519 (2025.01)] | 20 Claims |
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1. A semiconductor structure comprising:
a first gate structure;
a second gate structure coupled to the first gate structure;
a source region surrounded by the first gate structure and the second gate structure;
a first drain region separated from the source region by the first gate structure; and
a second drain region separated from the source region by the second gate structure; and
wherein a shape of the first drain region and a shape of the second drain region are different from each other from a plan view, and
wherein a first interface is between the first gate structure and the first drain region, a second interface is between the first gate structure and the source region, and a length of the first interface is different from a length of the second interface.
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