US 12,356,682 B2
Semiconductor structure with conductive structure
Ka-Hing Fung, Zhudong Township, Hsinchu County (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on May 20, 2022, as Appl. No. 17/749,359.
Prior Publication US 2023/0378260 A1, Nov. 23, 2023
Int. Cl. H10D 62/10 (2025.01); H10D 30/01 (2025.01); H10D 30/67 (2025.01); H10D 64/01 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01)
CPC H10D 62/118 (2025.01) [H10D 30/031 (2025.01); H10D 30/6713 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 64/017 (2025.01); H10D 84/0128 (2025.01); H10D 84/013 (2025.01); H10D 84/038 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device structure, comprising:
a plurality of first nanostructures formed over a substrate;
a gate structure formed over the first nanostructures;
a first source/drain (S/D) structure formed adjacent to the gate structure;
a silicide layer formed on a sidewall surface of the first S/D structure;
an S/D contact structure formed over the silicide layer, wherein the S/D contact structure extends from a first position to a second position, the first position is higher than a top surface of the gate structure, and the second position is below a bottommost nanostructure;
an etch stop layer formed over the first S/D structure; and
a dielectric layer formed over the etch stop layer, wherein the silicide layer is directly below the etch stop layer.