| CPC H10D 30/6713 (2025.01) [H10D 30/6735 (2025.01); H10D 30/6757 (2025.01)] | 20 Claims |

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1. A semiconductor device, comprising:
a substrate including a first active region and a second active region;
a first active pattern and a second active pattern on the first active region and the second active region, respectively;
a first source/drain pattern and a second source/drain pattern on the first active pattern and the second active pattern, respectively;
a first silicide pattern and a second silicide pattern on the first source/drain pattern and the second source/drain pattern, respectively, a first thickness of the first silicide pattern being greater than a second thickness of the second silicide pattern; and
a first active contact and a second active contact coupled to the first source/drain pattern and the second active pattern, respectively, a lowermost portion of the first active contact being at a higher level than a lowermost portion of the second active contact,
wherein a low onion of the first silicide pattern is at a lower level than an uppermost portion of the first active pattern.
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