| CPC H10D 30/6211 (2025.01) [H10D 30/024 (2025.01); H10D 64/017 (2025.01); H10D 64/667 (2025.01); H10D 30/0212 (2025.01); H10D 64/685 (2025.01); H10D 64/691 (2025.01)] | 20 Claims |
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1. A semiconductor device, comprising:
a fin extending over a semiconductor substrate;
an isolation region adjacent the fin;
a gate structure along sidewalls and over a top surface of a channel region of the fin, wherein the gate structure comprises:
a gate dielectric layer over the channel region;
a plurality of sublayers over the gate dielectric layer, the plurality of sublayers comprising an amorphous layer of a first metal and a crystalline layer of the first metal; and
a bulk metal material of the first metal over the plurality of sublayers; and
an epitaxial region over the fin adjacent the gate structure.
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