US 12,356,627 B2
Memory device containing composition-controlled ferroelectric memory elements and method of making the same
Rahul Sharangpani, Fremont, CA (US); Kartik Sondhi, Milpitas, CA (US); Raghuveer S. Makala, Campbell, CA (US); Tiffany Santos, Palo Alto, CA (US); Fei Zhou, San Jose, CA (US); Joyeeta Nag, San Jose, CA (US); and Bhagwati Prasad, San Jose, CA (US)
Assigned to Sandisk Technologies, Inc., Milpitas, CA (US)
Filed by SANDISK TECHNOLOGIES LLC, Addison, TX (US)
Filed on Aug. 19, 2022, as Appl. No. 17/821,012.
Prior Publication US 2024/0064992 A1, Feb. 22, 2024
Int. Cl. H10D 30/01 (2025.01); H10B 51/10 (2023.01); H10B 51/20 (2023.01); H10D 30/69 (2025.01)
CPC H10B 51/20 (2023.02) [H10B 51/10 (2023.02); H10D 30/0415 (2025.01); H10D 30/701 (2025.01)] 22 Claims
OG exemplary drawing
 
1. A semiconductor memory device, comprising:
an alternating stack of insulating layers and electrically conductive layers;
a memory opening vertically extending through the alternating stack; and
a memory opening fill structure located in the memory opening and comprising a vertical stack of discrete non-stoichiometric oxygen-deficient ferroelectric material portions and a vertical semiconductor channel,
wherein:
the discrete non-stoichiometric oxygen-deficient ferroelectric material portions are vertically spaced apart from each other;
each of the discrete non-stoichiometric oxygen-deficient ferroelectric material portions is in direct contact with a sidewall of a respective oxygen-gettering liner; and
the discrete non-stoichiometric oxygen-deficient ferroelectric material portions have a formula selected from:
HfO2-x, where x >0, or
ZrO2-y, where y >0, or
AlO1.5-z, where z >0.