| CPC H05K 1/0257 (2013.01) [H05K 1/0218 (2013.01); H05K 1/115 (2013.01); H05K 2201/10174 (2013.01)] | 8 Claims |

|
1. A printed circuit board comprising:
a power pattern layer;
a ground pattern layer; and
a wiring pattern layer on which a plurality of circuit elements are disposed,
wherein the wiring pattern layer comprises:
a signal line pattern through which an electrical signal is transmittable; and
a ground pattern electrically disconnected from the signal line pattern and having at least one via hole therein, wherein the at least via hole is electrically connected to the ground pattern layer,
wherein the signal line pattern is in contact with a first end of an overvoltage cutoff element of the plurality of circuit elements, wherein the overvoltage cutoff element is configured to operate in response to an overvoltage applied to the signal line pattern, the overvoltage being greater than or equal to a predetermined voltage,
wherein the ground pattern comprises:
a first detailed pattern in contact with a second end of the overvoltage cutoff element;
a second detailed pattern having the at least one via hole therein; and
a plurality of third detailed patterns electrically connecting the first detailed pattern and the second detailed pattern, and
wherein the at least one via hole is located at a remainder region of the second detailed pattern different from a plurality of first regions of the second detailed pattern that extend respectively from the plurality of third detailed patterns, each of the plurality of first regions extending along a length direction of the respective third detailed pattern.
|