| CPC H04W 76/25 (2018.02) [H04J 11/0076 (2013.01); H04L 1/1614 (2013.01); H04L 5/001 (2013.01); H04W 76/15 (2018.02)] | 16 Claims |

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1. A processor of a user equipment (UE) configured to perform operations comprising:
receiving secondary cell (SCell) activation configuration information from a first cell;
receiving a medium access control (MAC) control element (CE) from the first cell, wherein the MAC CE indicates that a SCell state is to be changed from a deactivated state to an activated state, wherein the MAC CE comprises a single-octet bitmap comprising seven Ci fields and one reserved bit, and wherein a Ci field indicates an activation status of a SCell with SCell index i; and
receiving aperiodic reference signals from a secondary cell (SCell), wherein the reception of the aperiodic reference signals is triggered by the MAC CE, and wherein the MAC CE comprises a trigger state (TS) field common to all component carriers (CCs) and indicates whether each CC is to utilize SCell activation with aperiodic reference signals or a synchronization signal block (SSB) based SCell activation.
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