| CPC H04W 72/232 (2023.01) [H04W 72/1263 (2013.01)] | 5 Claims |

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1. An apparatus, comprising:
at least one processor; and
at least one memory storing instructions that, when executed by the at least one processor, cause the apparatus at least to:
receive a configuration for resource block (RB) sets comprising at least one primary RB set; monitor physical downlink control channel (PDCCH) for downlink control information (DCI) on the at least one primary RB set for indicating one or more active and inactive RB sets; and
when DCI is detected, determine which of the RB sets are active or inactive, wherein the determined RB sets are considered active or inactive until a subsequent PDCCH monitoring occasion for DCI;
wherein the apparatus is further caused to: for an inactive RB set, continue monitoring PDCCH in case the inactive RB set is configured as primary RB set.
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