US 12,356,101 B2
Image sensor with a control circuit
Laurent Simony, Grenoble (FR); and Frederic Lalanne, Bernin (FR)
Assigned to STMicroelectronics (Grenoble 2) SAS, Grenoble (FR); and STMicroelectronics (Crolles 2) SAS, Crolles (FR)
Filed by STMicroelectronics (Grenoble 2) SAS, Grenoble (FR); and STMicroelectronics (Crolles 2) SAS, Crolles (FR)
Filed on Aug. 11, 2022, as Appl. No. 17/885,960.
Claims priority of application No. 2109100 (FR), filed on Aug. 31, 2021.
Prior Publication US 2023/0071932 A1, Mar. 9, 2023
Int. Cl. H04N 25/76 (2023.01); H04N 25/532 (2023.01); H04N 25/63 (2023.01); H04N 25/71 (2023.01); H04N 25/77 (2023.01); H04N 25/771 (2023.01); H04N 25/779 (2023.01); H10F 39/00 (2025.01)
CPC H04N 25/7795 (2023.01) [H04N 25/532 (2023.01); H04N 25/63 (2023.01); H04N 25/745 (2023.01); H04N 25/771 (2023.01); H04N 25/779 (2023.01); H10F 39/8023 (2025.01); H10F 39/80373 (2025.01); H10F 39/812 (2025.01); H04N 25/77 (2023.01)] 12 Claims
OG exemplary drawing
 
1. An image sensor, comprising:
an array of pixels inside and on top of a substrate; and
a control circuit configured to:
apply a first potential at ground to the substrate during a first phase of pixel operation for reading charge from the pixel; and
apply a second potential to the substrate that is positive with respect to the first potential during a second phase of pixel operation for integrating charge in the pixel;
wherein each pixel comprises:
a first area configured to generate charge in response to a luminous excitation; and
at least two circuit assemblies, wherein each circuit assembly comprises:
a second area configured to storing charge generated by the first area; and
a first transfer gate configured to controlling a transfer of the charge from the first area to the second area;
wherein the control circuit is configured to control, for each transfer gate of each circuit assembly of each pixel:
a setting of the first transfer gate to a conductive state by applying a third potential, and
a setting of the first transfer gate to a non-conductive state by applying a fourth potential smaller than the third potential:
wherein the second potential is controlled so that the first transfer gate is non-conductive when the second potential is applied to the substrate and the fourth potential is applied to the first transfer gate, the fourth potential being equal to or smaller than a potential of the substrate.