US 12,355,857 B2
Technologies for reassembling fragmented datagrams
John J. Browne, Limerick (IE); Chris M. MacNamara, Ballyclough (IE); Declan W. Doherty, Dublin (IE); and Konstantin Ananyev, Naas (IE)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Sep. 16, 2021, as Appl. No. 17/477,062.
Prior Publication US 2022/0006884 A1, Jan. 6, 2022
Int. Cl. H04L 12/54 (2022.01); H04L 47/43 (2022.01); H04L 49/9057 (2022.01); H04L 69/22 (2022.01); H04L 69/324 (2022.01)
CPC H04L 69/22 (2013.01) [H04L 69/324 (2013.01)] 25 Claims
OG exemplary drawing
 
1. A compute device comprising:
a network interface controller to:
receive a first plurality of packets; and
receive a second plurality of packets;
packet classifier circuitry to:
determine that individual packets of the first plurality of packets are fragments of a first datagram;
determine that individual packets of the second plurality of packets are fragments of a second datagram;
determine a first class of service for the first plurality of packets; and
determine a second class of service for the second plurality of packets; and
packet reassembler circuitry to:
determine whether the first class of service is higher than the second class of service; and
reassemble, based on the first plurality of packets and in response to a determination that the first class of service is higher than the second class of service, the first datagram before reassembly of the second datagram.