US 12,355,404 B2
Low noise amplifier with parasitic capacitance neutralization
Baker Scott, San Jose, CA (US); Padmmasini Desikan, San Jose, CA (US); George Maxim, Saratoga, CA (US); and Mihai Murgulescu, San Jose, CA (US)
Assigned to Qorvo US, Inc., Greensboro, NC (US)
Filed by Qorvo US, Inc., Greensboro, NC (US)
Filed on Apr. 22, 2022, as Appl. No. 17/726,653.
Prior Publication US 2023/0344392 A1, Oct. 26, 2023
Int. Cl. H03F 3/19 (2006.01); H03F 1/56 (2006.01); H03G 3/30 (2006.01)
CPC H03F 3/19 (2013.01) [H03F 1/565 (2013.01); H03G 3/3036 (2013.01); H03F 2200/294 (2013.01); H03F 2200/387 (2013.01); H03F 2200/451 (2013.01); H03G 2201/103 (2013.01); H03G 2201/307 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A low-noise amplifier system comprising:
a main amplifier having a main input coupled to a RF input and a main output connected to an RF output;
an impedance amplifier having an impedance input coupled to the RF input and an impedance output coupled to the RF output, wherein the impedance amplifier is configured to provide input impedance matching to the main amplifier and provide a first noise path that passes through the impedance amplifier such that the noise generated by the impedance amplifier is substantially out of phase with the noise that passes through a second noise path that passes through the main amplifier;
a neutralization amplifier configured to reduce parasitic capacitive loading within the first noise path;
a feedback resistor coupled between the impedance input and the impedance output, wherein the feedback resistor has a controllable variable resistance; and
a gain matching controller configured to control the controllable variable resistance such that a first gain of the noise in the first noise path matches a second gain of the noise in the second noise path.