US 12,355,007 B2
Package and method of fabricating the same
Hsien-Wei Chen, Hsinchu (TW); and Ming-Fa Chen, Taichung (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Jul. 31, 2023, as Appl. No. 18/362,098.
Application 18/362,098 is a division of application No. 17/337,594, filed on Jun. 3, 2021, granted, now 11,817,426.
Claims priority of provisional application 63/136,776, filed on Jan. 13, 2021.
Prior Publication US 2024/0021583 A1, Jan. 18, 2024
Int. Cl. H01L 25/00 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2023.01)
CPC H01L 25/0657 (2013.01) [H01L 24/08 (2013.01); H01L 24/80 (2013.01); H01L 25/50 (2013.01); H01L 2224/08146 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06582 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A package, comprising:
a first die, wherein the first die comprises a plurality of through vias extending from a first surface of the first die toward a second surface of the first die;
a second die disposed below the first die, wherein the second surface of the first die is bonded to the second die;
an isolation layer disposed in the first surface of the first die, wherein the plurality of through vias extend through the isolation layer, wherein the isolation layer is a dielectric material;
an encapsulation laterally surrounding the first die, wherein the encapsulation is laterally spaced apart from the isolation layer;
a buffer layer disposed over the first die, the isolation layer, and the encapsulation; and
a plurality of conductive terminals disposed over the buffer layer, wherein the plurality of conductive terminals is electrically connected to corresponding ones of the plurality of through vias.