US 12,355,001 B2
Semiconductor package structure and method for forming the same
Yen-Chu Tu, Kaohsiung (TW); Shang-Lun Tsai, Hsinchu (TW); Monsen Liu, Hsinchu County (TW); Shuo-Mao Chen, New Taipei (TW); and Shin-Puu Jeng, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Feb. 11, 2022, as Appl. No. 17/669,914.
Claims priority of provisional application 63/280,276, filed on Nov. 17, 2021.
Prior Publication US 2023/0154892 A1, May 18, 2023
Int. Cl. H01L 25/065 (2023.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01); H01L 23/538 (2006.01); H01L 25/00 (2006.01)
CPC H01L 25/0655 (2013.01) [H01L 21/4857 (2013.01); H01L 21/563 (2013.01); H01L 23/3157 (2013.01); H01L 23/49811 (2013.01); H01L 23/5383 (2013.01); H01L 23/5386 (2013.01); H01L 24/16 (2013.01); H01L 24/17 (2013.01); H01L 24/73 (2013.01); H01L 25/50 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/17177 (2013.01); H01L 2224/73204 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A semiconductor package structure, comprising:
a carrier substrate;
an interposer substrate disposed on the carrier substrate, wherein a recess is formed in the interposer substrate and over a first portion of the interposer substrate, and the first portion comprises a dielectric layer and second conductive features disposed in the dielectric layer;
a connecting element disposed in the interposer substrate, wherein the connecting element comprises a dielectric element and first conductive features disposed in the dielectric element, and the dielectric element is in contact with the second conductive features;
a first semiconductor device and a second semiconductor device disposed on the interposer substrate, wherein the first semiconductor device is electrically connected to the second semiconductor device through the connecting element;
a first underfill layer disposed between the first semiconductor device, the second semiconductor device, and the interposer substrate; and
a package layer surrounding the first semiconductor device, the second semiconductor device, and the first underfill layer.