US 12,354,994 B2
Three-dimensional memory device and fabrication method
Zhiyong Lu, Wuhan (CN); Sheng Peng, Wuhan (CN); Kai Yu, Wuhan (CN); Wenbo Zhang, Wuhan (CN); Yang Zhou, Wuhan (CN); and Jing Gao, Wuhan (CN)
Assigned to Yangtze Memory Technologies Co., Ltd., Wuhan (CN)
Filed by Yangtze Memory Technologies Co., Ltd., Wuhan (CN)
Filed on Jun. 13, 2022, as Appl. No. 17/838,910.
Prior Publication US 2023/0402425 A1, Dec. 14, 2023
Int. Cl. H01L 25/065 (2023.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 25/18 (2023.01)
CPC H01L 24/80 (2013.01) [H01L 24/08 (2013.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/80048 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/14511 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for fabricating a three-dimensional (3D) memory device, comprising:
forming a conductor/insulator stack over a substrate;
forming a dielectric layer of a dielectric material including atomic hydrogen over the conductor/insulator stack;
forming a plurality of semiconductor channels through the conductor/insulator stack; and
performing a thermal process to release the atomic hydrogen from the dielectric material and diffuse the atomic hydrogen into the conductor/insulator stack, wherein the plurality of semiconductor channels contains atomic hydrogen.