| CPC H01L 24/08 (2013.01) [H01L 24/03 (2013.01); H01L 24/05 (2013.01); H01L 24/09 (2013.01); H01L 24/11 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/73 (2013.01); H01L 24/32 (2013.01); H01L 2224/03015 (2013.01); H01L 2224/05552 (2013.01); H01L 2224/05557 (2013.01); H01L 2224/08053 (2013.01); H01L 2224/08059 (2013.01); H01L 2224/09055 (2013.01); H01L 2224/09133 (2013.01); H01L 2224/11848 (2013.01); H01L 2224/13014 (2013.01); H01L 2224/16059 (2013.01); H01L 2224/16148 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/73204 (2013.01)] | 24 Claims |

|
1. A semiconductor device comprising:
a first integrated circuit (IC) chip comprising:
a first substrate;
a spacer connected to the first substrate and including a plurality of holes, wherein at least one of the plurality of holes has a first shape; and
a plurality of solder bumps positioned in the plurality of holes, respectively; and
a second IC chip comprising:
a second substrate;
a plurality of electrode pads extending from the second substrate and connected to the plurality of solder bumps, respectively, wherein at least one of the plurality of electrode pads that corresponds to the at least one of the plurality of solder bumps has a second shape; and
non-conductive paste located atop the plurality of electrode pads and the second substrate, and configured to be displaced by the plurality of solder bumps on the first IC chip,
wherein the first shape and the second shape are non-coextensive such that there is at least one gap between the first shape and the second shape when projected on each other.
|