US 12,354,971 B2
Semiconductor structure, method for manufacturing same and memory
Shaowen Qiu, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed on Jun. 10, 2022, as Appl. No. 17/837,197.
Application 17/837,197 is a continuation of application No. PCT/CN2022/070600, filed on Jan. 6, 2022.
Claims priority of application No. 202111051957.5 (CN), filed on Sep. 8, 2021.
Prior Publication US 2023/0071603 A1, Mar. 9, 2023
Int. Cl. H01L 23/544 (2006.01); G03F 7/09 (2006.01); G03F 9/00 (2006.01); H01L 21/027 (2006.01)
CPC H01L 23/544 (2013.01) [G03F 7/094 (2013.01); G03F 9/7076 (2013.01); H01L 21/0273 (2013.01); H01L 2223/54426 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
two photolithography layers arranged in sequence, wherein each photolithography layer comprises a functional pattern and an overlay mark, and the photolithography layers comprise a first photolithography layer and a second photolithography layer, wherein the first photolithography layer comprises a first functional pattern and a first overlay mark, and the second photolithography layer comprises a second functional pattern and a second overlay mark; and
at least one blocking layer, wherein the blocking layer is only disposed between the first functional pattern and the second functional pattern, and
a vertical distance between the first functional pattern and the second functional pattern is greater than a vertical distance between the first overlay mark and the second overlay mark, in a stacking direction of the photolithography layers.
 
13. A memory, comprising the semiconductor structure according to claim 1.
 
14. A method for manufacturing semiconductor structure, comprising:
forming two photolithography layers and at least one blocking layer, wherein each photolithography layer comprises a functional pattern and an overlay mark, and the photolithography layers comprise a first photolithography layer and a second photolithography layer, wherein the first photolithography layer comprises a first functional pattern and a first overlay mark, and the second photolithography layer comprises a second functional pattern and a second overlay mark; and
wherein the blocking layer is only disposed between the first functional pattern and the second functional pattern, and
a vertical distance between the first functional pattern and the second functional pattern is greater than a vertical distance between the first overlay mark and the second overlay mark, in a stacking direction of the photolithography layers.