US 12,354,923 B2
Semiconductor device
Susumu Hogyoku, Kanagawa (JP); Shinya Morita, Kanagawa (JP); Rei Takamori, Kumamoto (JP); and Shuichi Oka, Kanagawa (JP)
Assigned to SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
Appl. No. 17/906,873
Filed by SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
PCT Filed Mar. 16, 2021, PCT No. PCT/JP2021/010492
§ 371(c)(1), (2) Date Sep. 21, 2022,
PCT Pub. No. WO2021/200094, PCT Pub. Date Oct. 7, 2021.
Claims priority of application No. 2020-065040 (JP), filed on Mar. 31, 2020.
Prior Publication US 2023/0135956 A1, May 4, 2023
Int. Cl. H01L 23/15 (2006.01); H01L 21/8238 (2006.01); H01L 23/10 (2006.01); H01L 23/40 (2006.01); H01L 23/532 (2006.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01)
CPC H01L 23/15 (2013.01) [H01L 23/10 (2013.01); H01L 23/4006 (2013.01); H01L 23/53228 (2013.01); H10D 84/0165 (2025.01); H10D 84/038 (2025.01)] 16 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a glass substrate that includes a first surface, a second surface provided on an opposite side of the first surface, and a first side surface provided between the first surface and the second surface;
a wiring that is provided on the first and second surfaces;
a metal film that covers the first side surface; and
a frame that is provided further on an outer side than the metal film, and that is bonded to the metal film at the first side surface.