| CPC H01L 22/34 (2013.01) | 15 Claims |
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1. A method of forming an integrated circuit, the method comprising:
forming a first doped region of a detection structure on a substrate, the first doped region comprises a first doping conductivity type;
forming a first capacitor of the detection structure, comprising:
forming a second doped region of a second doping conductivity type opposite the first doping conductivity type, the second doped region laterally surrounded by the first doped region, wherein the second doped region comprises a top surface area smaller than a top surface area of the first doped region;
forming a dielectric layer on the second doped region; and
forming an electrode disposed on the dielectric layer;
performing parametric testing on the first capacitor over a plurality of breakdown voltages; and
determining gate oxide integrity of the first capacitor as a result of performing the parametric testing over the plurality of breakdown voltages.
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