| CPC H01L 21/76882 (2013.01) [H01L 21/7684 (2013.01); H01L 21/76846 (2013.01); H01L 21/76858 (2013.01); H01L 21/76862 (2013.01); H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H01L 23/53238 (2013.01); H01L 21/76807 (2013.01); H01L 21/76849 (2013.01); H01L 21/76883 (2013.01); H01L 2221/1073 (2013.01); H10D 84/834 (2025.01)] | 20 Claims |

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1. A method of forming a semiconductor device, comprising:
forming an opening in a dielectric layer;
forming a metal nitride layer in the opening;
forming a combined liner layer over the metal nitride layer, the forming the combined liner layer comprising:
forming a first liner layer over the metal nitride layer, the first liner layer being a first metal;
after forming the first liner layer, forming a second liner layer over the first liner layer, the second liner layer being a second metal, the second metal being different from the first metal; and
after forming the second liner layer, performing a treatment to intermix the first liner layer and the second liner layer to form the combined liner layer, wherein the treatment results in an exposed surface of the combined liner layer comprising the first metal; and
forming a conductive material layer over the combined liner layer.
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