US 12,354,907 B2
Electron migration control in interconnect structures
Chun-Jen Chen, Hsinchu (TW); Kai-Shiung Hsu, Hsinchu (TW); Ding-I Liu, Hsinchu (TW); and Jyh-Nan Lin, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd.
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Feb. 28, 2022, as Appl. No. 17/682,823.
Application 17/682,823 is a continuation of application No. 16/941,040, filed on Jul. 28, 2020, granted, now 11,264,273.
Claims priority of provisional application 62/967,267, filed on Jan. 29, 2020.
Prior Publication US 2022/0181203 A1, Jun. 9, 2022
Int. Cl. H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/532 (2006.01)
CPC H01L 21/76826 (2013.01) [H01L 21/76832 (2013.01); H01L 21/76834 (2013.01); H01L 21/76849 (2013.01); H01L 23/5226 (2013.01); H01L 23/53238 (2013.01); H01L 23/53295 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An interconnect structure, comprising:
a first inter-metal dielectric (IMD) layer comprising an oxide layer;
a first conductive structure disposed within the IMD layer;
an oxynitride barrier layer comprising an oxynitride of a material of the first IMD layer disposed on the first IMD layer,
wherein a top portion of the first conductive structure is surrounded and in contact with the oxynitride barrier layer, and
wherein a bottom portion of the first conductive structure is surrounded and in contact with the oxide layer;
a diffusion barrier layer disposed on top surfaces of the oxynitride barrier layer and the first conductive structure;
a second IMD layer disposed on the diffusion barrier layer; and
a second conductive structure disposed within the second IMD layer and the diffusion barrier layer.