US 12,354,885 B2
Electronic package, electronic structure and manufacturing method thereof
Yi-Ling Chen, Taichung (TW); and Kuan-Wei Chuang, Taichung (TW)
Assigned to SILICONWARE PRECISION INDUSTRIES CO., LTD., Taichung (TW)
Filed by SILICONWARE PRECISION INDUSTRIES CO., LTD., Taichung (TW)
Filed on May 1, 2023, as Appl. No. 18/310,428.
Claims priority of application No. 112103067 (TW), filed on Jan. 30, 2023.
Prior Publication US 2024/0258121 A1, Aug. 1, 2024
Int. Cl. H05K 3/46 (2006.01); H01L 21/48 (2006.01); H01L 23/498 (2006.01); H01L 25/065 (2023.01); H01L 25/16 (2023.01); H05K 1/11 (2006.01); H05K 1/18 (2006.01)
CPC H01L 21/486 (2013.01) [H01L 21/4853 (2013.01); H01L 23/49827 (2013.01); H01L 25/0655 (2013.01); H01L 25/16 (2013.01); H05K 1/115 (2013.01); H05K 1/119 (2013.01); H05K 1/181 (2013.01); H05K 3/4602 (2013.01); H05K 3/4688 (2013.01)] 15 Claims
OG exemplary drawing
 
1. An electronic structure, comprising:
an electronic body;
a plurality of conductors disposed on one surface of the electronic body;
a protective layer formed on the electronic body and covering the plurality of conductors, wherein the protective layer is made of an epoxy molding compound;
a circuit portion bonded onto the other surface of the electronic body;
a plurality of external bumps formed on and electrically connected to the circuit portion;
a solder material formed on each of the plurality of external bumps; and
a bonding layer formed on the circuit portion and covering the plurality of external bumps and the solder material, wherein a thickness of the protective layer is five times a thickness of the bonding layer.