| CPC H01L 21/481 (2013.01) [H01L 21/02293 (2013.01); H01L 21/02362 (2013.01); H01L 21/045 (2013.01); H01L 21/76243 (2013.01); H01L 21/76814 (2013.01); H01L 21/76829 (2013.01); H10D 62/151 (2025.01)] | 42 Claims |

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1. A semiconductor structure, comprising:
an insulator layer;
a first field-effect transistor device, a second field-effect transistor device and an isolation field-effect transistor device between the first field-effect transistor device and the second field-effect transistor device formed on the insulator layer, wherein each of the first field-effect transistor device, the second field-effect transistor device and the isolation field-effect transistor device comprises:
a fin structure formed on the insulator layer, wherein the fin structure comprises channel layers and a gate structure that is wrapped around the channel layer; and
a first epitaxial source/drain structure and a second epitaxial source/drain structure connected to opposite sides of the channel layers, wherein the isolation field-effect transistor device is kept in an off-state;
a front-side gate contact formed on the first field-effect transistor device opposite the insulator layer, wherein the front-side gate contact is electrically connected to the gate structure of the first field-effect transistor device; and
a back-side gate contact formed passing through the insulator layer and electrically connected to the gate structure of the isolation field-effect transistor device.
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