US 12,354,874 B2
Method of manufacturing semiconductor devices and pattern formation method
An-Ren Zi, Hsinchu (TW); Chun-Chih Ho, Taichung (TW); Yahru Cheng, Taipei (TW); and Ching-Yu Chang, Yuansun Village (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Aug. 10, 2023, as Appl. No. 18/232,737.
Application 18/232,737 is a continuation of application No. 17/226,872, filed on Apr. 9, 2021, granted, now 11,942,322.
Claims priority of provisional application 63/028,665, filed on May 22, 2020.
Prior Publication US 2023/0386840 A1, Nov. 30, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 21/033 (2006.01); G03F 7/00 (2006.01); H01L 21/308 (2006.01)
CPC H01L 21/0334 (2013.01) [G03F 7/70033 (2013.01); H01L 21/3083 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor device, comprising:
forming a metallic photoresist layer, which is an alloy layer of two or more metal elements, over a target layer to be patterned;
selectively exposing the metallic photoresist layer to extreme ultraviolet radiation to form a latent pattern by changing a phase of an exposed portion of the alloy layer; and
developing the latent pattern by applying a developer to the selectively exposed photoresist layer to form a pattern,
wherein the metallic photoresist layer is deposited over the target layer by physical vapor deposition (PVD) or chemical vapor deposition (CVD).