| CPC G11C 7/222 (2013.01) [G11C 7/1066 (2013.01); G11C 7/1093 (2013.01)] | 26 Claims | 

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               1. A semiconductor device comprising: 
            a control circuit configured to generate a buffer enable signal that is enabled when patterns of a strobe signal and an inverted strobe signal match preset patterns after a start of a write operation and configured to generate an internal strobe signal by dividing frequencies of an input strobe signal and an inverted input strobe signal; and 
                a buffer circuit configured to generate the input strobe signal and the inverted input strobe signal from the strobe signal and the inverted strobe signal that are received when the buffer enable signal is enabled and configured to generate transfer data by receiving data for performing the write operation when the buffer enable signal is enabled. 
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