US 12,354,672 B2
Memory sensing with global non-regular counter and/or global multiple reference voltages
Chun-Hsiung Hung, Hsinchu (TW)
Assigned to MACRONIX INTERNATIONAL CO., LTD., Hsinchu (TW)
Filed by MACRONIX INTERNATIONAL CO., LTD., Hsinchu (TW)
Filed on Aug. 28, 2023, as Appl. No. 18/238,908.
Prior Publication US 2025/0078935 A1, Mar. 6, 2025
Int. Cl. G11C 7/00 (2006.01); G11C 16/26 (2006.01); H03K 21/08 (2006.01)
CPC G11C 16/26 (2013.01) [H03K 21/08 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A circuit, comprising:
an array of memory cells including a plurality of bit lines and word lines;
sensing circuits configured to sense a difference between first and second currents on respective bit lines in selected bit lines and to produce outputs for the selected bit lines as a function of the difference; and
a global programmable non-regular counter configured to provide a count value to each of the sensing circuits in dependence on a clock signal,
wherein each sensing circuit, of the sensing circuits, includes (i) a local detector circuit configured to detect a voltage (Vc) generated in dependence on the difference and (ii) a reference voltage selector configured to receive one or more reference voltages from a global dynamic voltage reference source and to select a single reference voltage (Vref) from the one or more reference voltages, and
wherein each sensing circuit, of the sensing circuits, produces an output in dependence on (i) a difference between the detected voltage (Vc) and the selected single reference voltage (Vref) and (ii) a stored count value received from the global programmable non-regular counter, the count value being stored in dependence on a value of the difference between the detected voltage (Vc) and the selected single reference voltage (Vref).