US 12,354,670 B2
Dynamic adjustment of offset voltages for reading memory cells in a memory device
Mustafa N. Kaynak, San Diego, CA (US); Sivagnanam Parthasarathy, Carlsbad, CA (US); and Patrick Robert Khayat, San Diego, CA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Nov. 11, 2022, as Appl. No. 18/054,879.
Application 18/054,879 is a continuation of application No. 17/013,423, filed on Sep. 4, 2020, granted, now 11,514,989.
Prior Publication US 2023/0074966 A1, Mar. 9, 2023
Int. Cl. G06F 3/06 (2006.01); G11C 16/26 (2006.01); G11C 16/34 (2006.01); G11C 16/04 (2006.01)
CPC G11C 16/26 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01); G11C 16/349 (2013.01); G11C 16/0483 (2013.01)] 5 Claims
OG exemplary drawing
 
1. An apparatus comprising:
a storage media having memory cells; and
a controller configured to:
store offset voltages for adjusting read voltages, wherein magnitudes of the offset voltages are based on a number of program/erase cycles;
adjust, based on the offset voltages, read voltages for reading first memory cells;
read the first memory cells using the adjusted read voltages;
determine that an error occurred in reading the first memory cells; and
in response to determining that the error occurred, update the offset voltages.