US 12,354,668 B2
Programming method for semiconductor device and semiconductor device
Kaiwei Li, Wuhan (CN); Jianquan Jia, Wuhan (CN); Yuanyuan Min, Wuhan (CN); Ying Cui, Wuhan (CN); Yali Song, Wuhan (CN); Hongtao Liu, Wuhan (CN); Xinlei Jia, Wuhan (CN); and An Zhang, Wuhan (CN)
Assigned to YANGTZE MEMORY TECHNOLOGIES CO., LTD., Wuhan (CN)
Filed by YANGTZE MEMORY TECHNOLOGIES CO., LTD., Wuhan (CN)
Filed on Dec. 28, 2022, as Appl. No. 18/090,444.
Application 18/090,444 is a continuation of application No. PCT/CN2021/126181, filed on Oct. 25, 2021.
Claims priority of application No. 202110010729.7 (CN), filed on Jan. 6, 2021.
Prior Publication US 2023/0162798 A1, May 25, 2023
Int. Cl. G11C 16/10 (2006.01); G11C 16/08 (2006.01); G11C 16/28 (2006.01)
CPC G11C 16/102 (2013.01) [G11C 16/08 (2013.01); G11C 16/28 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A programming method for a semiconductor device, wherein the semiconductor device comprises a memory string comprising a plurality of first memory cells and a first dummy cell stacked in sequence, wherein a gate of each first memory cell is connected with a respective word line, and a gate of the first dummy cell is connected with a first dummy word line, the first dummy cell is a memory cell that is programmed not for data storage,
the programming method comprises:
in a programming phase, applying a first pass voltage to a word line corresponding to a first unprogrammed memory cell, wherein the first unprogrammed memory cell is an unprogrammed memory cell of the plurality of first memory cells separated from a to-be-programmed memory cell by a first preset number of first memory cells, the first pass voltage being applied to another word line, corresponding to a second unprogrammed memory cell of the plurality of first memory cells, next to the to-be-programmed memory cell; and
after applying the first pass voltage to the word line corresponding to the first unprogrammed memory cell, applying a programming voltage to a word line corresponding to the to-be-programmed memory cell.