US 12,354,650 B2
Integrated circuits with single-functional-unit level integration of electronic and photonic elements
Yong Zhang, Charlotte, NC (US); Antardipan Pal, Charlotte, NC (US); and Dennis Yau, Cupertino, CA (US)
Assigned to The University of North Carolina at Charlotte, Charlotte, NC (US)
Filed by The University of North Carolina at Charlotte, Charlotte, NC (US)
Filed on Oct. 11, 2022, as Appl. No. 17/963,424.
Application 17/963,424 is a continuation in part of application No. 17/103,154, filed on Nov. 24, 2020, abandoned.
Claims priority of provisional application 62/945,546, filed on Dec. 9, 2019.
Claims priority of provisional application 63/117,664, filed on Nov. 24, 2020.
Prior Publication US 2023/0038024 A1, Feb. 9, 2023
Int. Cl. G11C 11/42 (2006.01); G11C 11/418 (2006.01); G11C 11/419 (2006.01)
CPC G11C 11/42 (2013.01) [G11C 11/418 (2013.01); G11C 11/419 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory device comprising:
a first electrical bitline;
a second electrical bitline;
a bitcell configured to store a bit value, the bitcell comprising:
storage circuitry comprising at least one transistor, and
a pair of light-effect transistor access devices arranged for connecting the bitcell to the first electrical bitline and the second electrical bitline; and
an optical waveguide wordline arranged for routing an optical signal to the pair of light-effect transistor access devices.