US 12,354,557 B2
Thin film transistors for circuits for use in display devices
Dong Kil Yim, Pleasanton, CA (US); Soo Young Choi, Fremont, CA (US); and Jung Bae Kim, San Jose, CA (US)
Assigned to Applied Materials, Inc., Santa Clara, CA (US)
Appl. No. 18/556,460
Filed by Applied Materials, Inc., Santa Clara, CA (US)
PCT Filed May 7, 2021, PCT No. PCT/US2021/031364
§ 371(c)(1), (2) Date Oct. 20, 2023,
PCT Pub. No. WO2022/235273, PCT Pub. Date Nov. 10, 2022.
Prior Publication US 2024/0194152 A1, Jun. 13, 2024
Int. Cl. G09G 3/3266 (2016.01); H01L 29/786 (2006.01); H10D 30/67 (2025.01)
CPC G09G 3/3266 (2013.01) [H10D 30/6755 (2025.01); H10D 30/6757 (2025.01); G09G 2300/0417 (2013.01); G09G 2320/0214 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device comprising:
a pixel circuit, the pixel circuit comprising:
a driving thin film transistor (TFT), the driving TFT comprising:
a driving channel;
an inter layer dielectric (ILD) layer disposed over the driving channel;
a driving source electrode disposed through the ILD layer to contact an upper surface of the driving channel, the driving source electrode coupled to a source voltage via a source electrode path of wiring; and
a driving top gate electrode disposed above the driving channel and electrically connected to the driving source electrode and the source voltage via a top gate electrode path of wiring coupled to the source electrode path; and
a first switching TFT connected to a scan line; and
a gate on array (GOA) circuit, the GOA circuit comprising a second switching TFT and a third switching TFT, wherein the second switching TFT and the third switching TFT are connected to the scan line.