| CPC G06F 3/0659 (2013.01) [G06F 3/0619 (2013.01); G06F 3/0673 (2013.01)] | 20 Claims |
|
1. A memory device comprising:
a memory cell array including first to fourth memory cells respectively connected to first to fourth word lines;
a sense amplifier including a first sensing circuit configured to generate a first weighted sum, based on a first weight stored in the first memory cell and a second weight stored in the third memory cell, in response to an activation of the first and third word lines at a first time point;
an input and output circuit configured to output the first weighted sum to an external device in response to a first read command; and
a restore circuit configured to perform a restore operation for storing a first data item stored in the second memory cell to the first memory cell and for storing a second data item stored in the fourth memory cell to the third memory cell after the first time point.
|