US 12,353,767 B2
Techniques for transferring commands to a dynamic random-access memory
Robert Bloemer, Sterling, MA (US); and Gautam Bhatia, Mountain View, CA (US)
Assigned to NVIDIA CORPORATION, Santa Clara, CA (US)
Filed by NVIDIA CORPORATION, Santa Clara, CA (US)
Filed on Oct. 25, 2023, as Appl. No. 18/494,707.
Application 18/494,707 is a continuation of application No. 17/523,780, filed on Nov. 10, 2021, granted, now 11,861,229.
Claims priority of provisional application 63/179,954, filed on Apr. 26, 2021.
Claims priority of provisional application 63/152,817, filed on Feb. 23, 2021.
Claims priority of provisional application 63/152,814, filed on Feb. 23, 2021.
Claims priority of provisional application 63/144,971, filed on Feb. 2, 2021.
Prior Publication US 2024/0069812 A1, Feb. 29, 2024
Int. Cl. G06F 3/06 (2006.01); G11C 11/406 (2006.01); G11C 11/4072 (2006.01); G11C 11/4076 (2006.01); G11C 11/4096 (2006.01)
CPC G06F 3/0659 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0679 (2013.01); G11C 11/40615 (2013.01); G11C 11/4072 (2013.01); G11C 11/4076 (2013.01); G11C 11/4096 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A computer-implemented method for transferring commands to a memory device, the method comprising:
receiving an asynchronous signal on a data input pin of the memory device while a receiver for a clock signal input pin associated with the data input pin is powered down;
determining that data received by the memory device via the asynchronous signal has a first value;
in response to determining that the data has the first value, initiating a synchronization phase to receive a synchronization command from a memory controller; and
in response to receiving the synchronization command, establishing synchronization with the memory controller.