US 12,353,726 B2
Memory device and program operation thereof
Zhichao Du, Wuhan (CN); Yu Wang, Wuhan (CN); Haibo Li, Wuhan (CN); Ke Jiang, Wuhan (CN); and Ye Tian, Wuhan (CN)
Assigned to YANGTZE MEMORY TECHNOLOGIES CO., LTD., Wuhan (CN)
Filed by YANGTZE MEMORY TECHNOLOGIES CO., LTD., Wuhan (CN)
Filed on Jul. 19, 2023, as Appl. No. 18/223,949.
Application 18/223,949 is a continuation in part of application No. 17/483,350, filed on Sep. 23, 2021, granted, now 11,915,761.
Application 17/483,350 is a continuation of application No. PCT/CN2021/094511, filed on May 19, 2021.
Claims priority of application No. PCT/CN2020/091037 (WO), filed on May 19, 2020.
Prior Publication US 2023/0367488 A1, Nov. 16, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0619 (2013.01) [G06F 3/0659 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory device, comprising:
a memory string comprising a drain select gate (DSG) transistor, a plurality of memory cells, and a source select gate (SSG) transistor; and
a peripheral circuit coupled to the memory string and configured to, during a program operation on a select memory cell of the plurality of memory cells:
after detecting an interrupt signal, perform a clean process that comprises turning on at least one of the DSG transistor or the SSG transistor.
 
13. A memory system, comprising:
a memory device configured to store data and comprising:
a memory string comprising a drain select gate (DSG) transistor, a plurality of memory cells, and a source select gate (SSG) transistor; and
a peripheral circuit coupled to the memory string and configured to, during a program operation on a select memory cell of the plurality of memory cells:
after detecting an interrupt signal, perform a clean process that comprises turning on at least one of the DSG transistor or the SSG transistor; and
a memory controller coupled to the memory device and configured to transmit a program command to the peripheral circuit for the program operation.
 
15. A method for operating a memory device comprising a memory string, the memory string comprising a drain select gate (DSG) transistor, a plurality of memory cells, and a source select gate (SSG) transistor, the method comprising:
initiating a program operation on a select memory cell of the plurality of memory cells; and
during the program operation, after detecting an interrupt signal, performing a clean process that comprises turning on at least one of the DSG transistor or the SSG transistor.