| CPC G06F 3/0607 (2013.01) [G06F 3/0635 (2013.01); G06F 3/0665 (2013.01); G06F 3/0679 (2013.01)] | 20 Claims |

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1. An apparatus comprising:
at least one processing device comprising a processor coupled to a memory;
said at least one processing device being configured:
to identify a logical storage device accessible in at least first and second storage systems;
to measure response times for accessing the logical storage device in each of the first and second storage systems; and
to modify, based at least in part on the measured response times, asymmetric access state settings for the logical storage device;
wherein measuring response times for accessing the logical storage device in each of the first and second storage systems comprises sending one or more commands from a host device to each of the first and second storage systems, receiving responses to each of the one or more commands in the host device from each of the first and second storage systems, comparing in the host device the responses received from the first and second storage systems, the responses including at least a first response received from the first storage system and a second response received from the second storage system, and identifying in the host device that the host device is configured as an equidistant host device relative to the first and second storage systems, based at least in part on a result of the comparing of the responses from the first and second storage systems, by the host device, indicating that the first and second storage systems are less than a threshold distance apart from one another, wherein the comparing of the responses includes computing in the host device a computed distance between the first and second storage systems, based at least in part on the responses, and comparing the computed distance to the threshold distance, and wherein the modifying of the asymmetric access state settings for the logical storage device is performed responsive to the computed distance being less than the threshold distance.
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