| CPC G06F 13/4282 (2013.01) [G06F 13/4068 (2013.01)] | 27 Claims |

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1. An input buffer comprising:
a first input transistor having a source that is coupled to a first voltage rail through a first current source and a gate coupled to a first wire of a multi-wire serial bus;
a first injection circuit comprising:
three or more resistors configured to couple the wires of the multi-wire serial bus to a common node of the first injection circuit; and
a capacitor configured to couple the common node of the first injection circuit to the source of the first input transistor;
a second input transistor having a source that is coupled to the first voltage rail through a second current source and a gate coupled to a second wire of the multi-wire serial bus; and
a second injection circuit comprising:
three or more resistors configured to couple the wires of the multi-wire serial bus to a common node of the second injection circuit; and
a capacitor configured to couple the common node of the second injection circuit to the source of the second input transistor;
wherein the input buffer is provided in a first differential receiver circuit, and wherein each combination of two wires in a three-wire serial bus is coupled to one of three differential receiver circuits.
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