US 12,353,339 B2
Data transfer method, data transfer device and computer readable storage medium
Wentao Zhu, Beijing (CN); Gaoming Sun, Beijing (CN); Jingchao Yuan, Beijing (CN); Zhiheng Zhou, Beijing (CN); Hongxin Pan, Beijing (CN); Jingpeng Zhao, Beijing (CN); and Xin Duan, Beijing (CN)
Assigned to Chongqing BOE Optoelectronics Technology Co., Ltd., Chongqing (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
Appl. No. 18/036,170
Filed by Chongqing BOE Optoelectronics Technology Co., Ltd., Chongqing (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
PCT Filed Mar. 28, 2022, PCT No. PCT/CN2022/083273
§ 371(c)(1), (2) Date May 10, 2023,
PCT Pub. No. WO2023/184064, PCT Pub. Date Oct. 5, 2023.
Prior Publication US 2024/0370389 A1, Nov. 7, 2024
Int. Cl. G06F 13/16 (2006.01)
CPC G06F 13/1684 (2013.01) [G06F 13/1657 (2013.01); G06F 13/1678 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A data transfer method, applied to a data transfer device comprising at least one first-stage memory, at least one second-stage memory and at least one third-stage memory which are connected in sequence, the method comprising:
receiving a first input comprising a number of input lanes and/or a number of output lanes;
selecting a corresponding second-stage memory according to the number of input lanes and/or the number of output lanes, and controlling a first read signal and a second read signal according to the number of input lanes and/or the number of output lanes;
storing data of the input lanes through the at least one first-stage memory;
reading data of the at least one first-stage memory and writing the data into the corresponding second-stage memory when the first read signal is enabled; and
reading data of the corresponding second-stage memory and writing the data into the at least one third-stage memory when the second read signal is enabled.