US 12,353,236 B2
Large-scale accelerator system energy performance optimization
Michael David Hutton, Mountain View, CA (US); Georgios Konstadinidis, San Jose, CA (US); Lluis-Miquel Munguia, San Francisco, CA (US); Safeen Huda, San Jose, CA (US); and Gaurav Agrawal, San Jose, CA (US)
Assigned to Google LLC, Mountain View, CA (US)
Filed by Google LLC, Mountain View, CA (US)
Filed on Oct. 18, 2022, as Appl. No. 17/968,048.
Claims priority of provisional application 63/257,332, filed on Oct. 19, 2021.
Prior Publication US 2023/0119235 A1, Apr. 20, 2023
Int. Cl. G06F 1/08 (2006.01); G06F 11/34 (2006.01)
CPC G06F 1/08 (2013.01) [G06F 11/3495 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A method of controlling performance of a partitioned workload partitioned among a plurality of accelerator chips of a multi-chip system, the method comprising:
receiving, by one or more processors, performance speed data for each of the plurality of accelerator chips;
obtaining, by the one or more processors, a model of the partitioned workload, wherein the partitioned workload comprises a plurality of tasks, wherein different tasks of the plurality of tasks are performed by different accelerator chips of the plurality of accelerator chips, and wherein the model indicates a flow of data between the tasks and which tasks are performed by which accelerator chips;
determining, by the one or more processors, one or more of the accelerator chips included in the plurality of accelerator chips that are either overworked or underworked based on the model of the partitioned workload and the performance speed data for each of the plurality of accelerator chips; and
adjusting, by the one or more processors, performance speeds of the determined one or more accelerator chips that are either overworked or underworked.