US 12,353,230 B2
DVR with pulsed control and gradual NLC
Anand Ramasundar, Portland, OR (US); Cary Renzema, North Plains, OR (US); Fabrice Paillet, Portland, OR (US); James Keith Hodgson, Hillsboro, OR (US); Po-Cheng Chen, Tigard, OR (US); Sergio Carlo Rodriguez, Hillsboro, OR (US); Harish K. Krishnamurthy, Beaverton, OR (US); and Jason Muhlestein, Beaverton, OR (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Dec. 23, 2021, as Appl. No. 17/561,109.
Prior Publication US 2023/0205244 A1, Jun. 29, 2023
Int. Cl. G05F 1/56 (2006.01); G05F 1/565 (2006.01); G05F 1/575 (2006.01)
CPC G05F 1/575 (2013.01) [G05F 1/565 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A digital voltage regulator (DVR) comprising:
first, second, and third comparators configured to determine whether a load voltage (VLOAD) (i) drops below a gradual non-linear control (NLC) undershoot threshold voltage, (ii) rises above or drops below a reference voltage, and (iii) rises above a gradual NLC overshoot threshold voltage, respectively;
power gates (PGs) configured to adjust an output voltage (VOUT) based on a provided power gate (PG) code; and
voltage regulator (VR) controller circuitry comprising:
synchronous LC circuitry configured to increase or decrease, by a first increment, the PG code responsive to the VLOAD dropping below the reference voltage and rising above the reference voltage, respectively, and
asynchronous gradual NLC circuitry configured to increase or decrease, by a second increment greater than the first increment and less than half a maximum PG code value, the PG code responsive to the VLOAD dropping below the gradual NLC undershoot threshold voltage and rising above the gradual NLC overshoot threshold voltage, respectively.