| CPC G02F 1/133382 (2013.01) [G02F 1/13338 (2013.01); G02F 1/136286 (2013.01); G02F 1/1368 (2013.01)] | 16 Claims |
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1. An array substrate, comprising:
a first base substrate;
a plurality of pixel units on the first base substrate, wherein the plurality of pixel units are arranged in an array in a first direction and a second direction, at least one of the plurality of pixel units comprises a pixel driving circuit, and the pixel driving circuit comprises at least one thin film transistor;
at least one data line on the first base substrate;
at least one touch signal line on the first base substrate;
a heating element on the first base substrate, wherein the heating element is configured to generate heat under a driving of a drive-for-heating current;
a common electrode on the first base substrate, wherein the common electrode is reused as a touch electrode, and the touch electrode is electrically connected to the touch signal line; and
a pixel electrode on the first base substrate, wherein the pixel electrode is electrically connected to the data line through the pixel driving circuit,
wherein the array substrate comprises: a semiconductor layer on the first base substrate; a first conductive layer on a side of the semiconductor layer away from the first base substrate; a second conductive layer on a side of the first conductive layer away from the first base substrate; a third conductive layer on a side of the second conductive layer away from the first base substrate; and a fourth conductive layer on a side of the third conductive layer away from the first base substrate,
wherein the at least one thin film transistor comprises an active layer and a gate electrode, the active layer is in the semiconductor layer, the gate electrode is in the first conductive layer, the data line is in the second conductive layer, one of the pixel electrode and the common electrode is in the third conductive layer, and the other of the pixel electrode and the common electrode is in the fourth conductive layer,
wherein a layer in which the heating element is located is between the semiconductor layer and the third conductive layer,
wherein the array substrate further comprises a gate line provided on the first base substrate, and the heating element comprises a plurality of first heating wires, and the plurality of first heating wires and the gate line are in the first conductive layer,
wherein a plurality of gate lines extend in the first direction and are spaced apart in the second direction, and the plurality of first heating wires extend in the first direction and are spaced apart in the second direction, and any two of the plurality of first heating wires and the plurality of gate lines are spaced apart in the second direction,
wherein each of the at least one data line comprises a first data line portion, a second data line portion, and a third data line portion between the first data line portion and the second data line portion, the first data line portion extends in a third direction intersecting with the second direction, and the second data line portion extends in a fourth direction intersecting with the second direction, and
wherein an orthographic projection of at least one of the plurality of first heating wires on the first base substrate overlaps at least partially with an orthographic projection of at least one third data line portion on the first base substrate.
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