US 12,352,799 B2
FPGA chip-based system and method for detecting cable insulation state
Daxing Zhang, Huizhou (CN); Zerong Huang, Huizhou (CN); Xingguang Yin, Huizhou (CN); Bingzi Cai, Huizhou (CN); Haoyu Yuan, Huizhou (CN); Mingming Tian, Huizhou (CN); Zeji Li, Huizhou (CN); Juhan Wang, Huizhou (CN); Yingping Yuan, Huizhou (CN); and Zhenxing Wen, Huizhou (CN)
Assigned to HUIZHOU POWER SUPPLY BUREAU OF GUANGDONG POWER GRID CO., LTD., Huizhou (CN)
Appl. No. 18/846,020
Filed by HUIZHOU POWER SUPPLY BUREAU OF GUANGDONG POWER GRID CO., LTD., Huizhou (CN)
PCT Filed Feb. 20, 2023, PCT No. PCT/CN2023/077061
§ 371(c)(1), (2) Date Sep. 11, 2024,
PCT Pub. No. WO2023/185311, PCT Pub. Date Oct. 5, 2023.
Claims priority of application No. 202210308342.4 (CN), filed on Mar. 28, 2022.
Prior Publication US 2025/0110170 A1, Apr. 3, 2025
Int. Cl. G01R 31/12 (2020.01); G01R 31/14 (2006.01)
CPC G01R 31/14 (2013.01) 9 Claims
OG exemplary drawing
 
1. A field-programmable gate array (FPGA) chip-based system for detecting a cable insulation state, comprising a detection card and a coupler;
wherein the detection card comprises an FPGA chip, and a first circuit and a second circuit that are connected to the FPGA chip;
wherein the FPGA chip comprises a logic control module and a detection signal generation module that are connected in series to the first circuit, and a synchronization module, a noise reduction module, a signal processing module and a state evaluation module that are connected in series to the second circuit;
wherein the synchronization module comprises a coarse synchronization correlation calculation module, a fine synchronization correlation calculation module and a data delay module;
wherein the coarse synchronization correlation calculation module is configured to calculate an energy of a reflection signal and an autocorrelation value, and the coarse synchronization correlation calculation module is connected to a first comparator;
the fine synchronization correlation calculation module is configured to calculate a cross-correlation value of the reflection signal and a training sequence in a read only memory (ROM) module, and the fine synchronization correlation calculation module is connected to a second comparator;
the first comparator and the second comparator are connected to a selector separately, and the selector is connected to a third comparator,
the data delay module is configured to perform delay on input signal data and use the delayed data as an input signal of a data interception module, and a delay duration is a data processing duration of the synchronization module;
the data interception module is configured to output a signal to the noise reduction module in response to an instruction signal sent by the third comparator; and
wherein the first circuit is configured to send a detection signal generated by the detection signal generation module to the coupler, the coupler is configured to: inject the detection signal into a to-be-detected cable connected to the coupler, extract the reflection signal from the to-be-detected cable and send the reflection signal to the state evaluation module through the second circuit to evaluate a state of the to-be-detected cable.