US 11,057,995 B2
Backplane footprint for high speed, high density electrical connectors
Marc B. Cartier, Jr., Dover, NH (US); Mark W. Gailus, Concord, MA (US); Tom Pitten, Merrimack, NH (US); Donald A. Girard, Jr., Bedford, NH (US); and Huilin Ren, Amherst, NH (US)
Assigned to Amphenol Corporation, Wallingford, CT (US)
Filed by Amphenol Corporation, Wallingford, CT (US)
Filed on Jun. 10, 2019, as Appl. No. 16/435,781.
Claims priority of provisional application 62/683,146, filed on Jun. 11, 2018.
Prior Publication US 2019/0380204 A1, Dec. 12, 2019
Int. Cl. H05K 1/11 (2006.01); H01R 13/66 (2006.01); H05K 1/14 (2006.01)
CPC H05K 1/115 (2013.01) [H01R 13/6658 (2013.01); H05K 1/117 (2013.01); H05K 1/145 (2013.01)] 14 Claims
OG exemplary drawing
1. A printed circuit board comprising:
at least one dielectric layer; and
at least one conductive element formed on the dielectric layer and configured for solder attachment to a connector lead of a surface mount connector, the conductive element having a recess in a surface thereof, wherein the recess is configured to be smaller in diameter than the connector lead and is configured to receive only a tip portion of the connector lead, wherein the conductive element is part of a via that extends through the dielectric layer, wherein the at least one dielectric layer comprises a plurality of layers including conductive layers separated by dielectric layers, and the via extends from an upper surface of the printed circuit board through one or more of the plurality of layers, and wherein the via is configured for attachment to a superelastic connector lead of the surface mount connector.