US 11,056,573 B2
Implantation and annealing for semiconductor device
Yu-Chang Lin, Hsinchu (TW); Tien-Shun Chang, New Taipei (TW); Szu-Ying Chen, Toufen Township (TW); Chun-Feng Nieh, Hsinchu (TW); Sen-Hong Syue, Zhubei (TW); and Huicheng Chang, Tainan (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jun. 14, 2019, as Appl. No. 16/441,487.
Prior Publication US 2020/0395462 A1, Dec. 17, 2020
Int. Cl. H01L 29/76 (2006.01); H01L 29/66 (2006.01); H01L 27/092 (2006.01); H01L 29/78 (2006.01); H01L 21/8238 (2006.01); H01L 21/265 (2006.01); H01L 21/324 (2006.01)
CPC H01L 29/66545 (2013.01) [H01L 21/265 (2013.01); H01L 21/324 (2013.01); H01L 21/823821 (2013.01); H01L 21/823828 (2013.01); H01L 27/0924 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of manufacturing a device, the method comprising:
forming a dummy gate on a semiconductor substrate;
depositing a mask on the dummy gate;
forming an interlayer dielectric (ILD) over the semiconductor substrate;
performing a first planarization on the ILD, a top surface of the ILD being level with a top surface of the mask after the first planarization;
removing the mask;
performing a second planarization on the ILD, a top surface of the ILD being level with a top surface of the dummy gate after the second planarization;
implanting a dopant into the ILD;
after implanting the dopant, removing the dummy gate; and
after removing the dummy gate, performing an anneal on the ILD.