US 11,056,570 B2
Nanosheet transistor with dual inner airgap spacers
Ruilong Xie, Schenectady, NY (US); Kangguo Cheng, Schenectady, NY (US); Chun-Chen Yeh, Danbury, NY (US); and Tenko Yamashita, Schenectady, NY (US)
Assigned to INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US)
Filed by International Business Machines Corporation, Armonk, NY (US)
Filed on Jan. 3, 2020, as Appl. No. 16/733,487.
Application 16/733,487 is a division of application No. 15/942,971, filed on Apr. 2, 2018, granted, now 10,566,438.
Prior Publication US 2020/0144388 A1, May 7, 2020
Int. Cl. H01L 29/49 (2006.01); H01L 29/66 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/786 (2006.01); H01L 21/02 (2006.01); H01L 21/8238 (2006.01); H01L 21/306 (2006.01); H01L 21/308 (2006.01); H01L 27/092 (2006.01)
CPC H01L 29/4991 (2013.01) [H01L 21/02532 (2013.01); H01L 21/02603 (2013.01); H01L 21/308 (2013.01); H01L 21/30604 (2013.01); H01L 21/823807 (2013.01); H01L 21/823864 (2013.01); H01L 21/823878 (2013.01); H01L 27/092 (2013.01); H01L 29/0649 (2013.01); H01L 29/0673 (2013.01); H01L 29/42392 (2013.01); H01L 29/4908 (2013.01); H01L 29/66545 (2013.01); H01L 29/66553 (2013.01); H01L 29/66742 (2013.01); H01L 29/78651 (2013.01); H01L 29/78696 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of fabricating a nanosheet transistor comprising:
receiving a substrate structure having a set of nanosheet layers and a set of sacrificial layers stacked upon a substrate, the substrate structure including a p-channel region and an n-channel region;
etching a portion of the set of sacrificial layers to form divots within the p-channel region and the n-channel region of the set of sacrificial layers;
forming a first liner on the p-channel region and the n-channel region, the first liner being formed of a material having a positive charge;
removing the first liner from the p-channel region;
forming a second liner on the p-channel region and n-channel region, the second liner being formed of a material having a negative charge;
selectively removing the second liner from portions of the p-channel region and n-channel region, wherein portions of the second liner within the divots substantially remain;
depositing a p-type epitaxy in the p-channel region to form first air gap spacers of the divots in the p-channel region;
selectively removing the first liner from the n-channel region, wherein portions of the first liner within the divots of the n-channel region substantially remain; and
depositing an n-type epitaxy in the n-channel region to form second air gap spacers of the divots in the n-channel region.