US 11,056,531 B2
Method of fabricating a monolithic sensor device from a layered structure
David Robert Sime Cumming, Glasgow (GB); Chengzhi Xie, Glasgow (GB); and Vincenzo Pusino, Glasgow (GB)
Assigned to The University Court of the University of Glasgow, Glasgow (GB)
Appl. No. 16/619,444
Filed by The University Court of the University of Glasgow, Glasgow (GB)
PCT Filed Jun. 1, 2018, PCT No. PCT/EP2018/064464
§ 371(c)(1), (2) Date Dec. 4, 2019,
PCT Pub. No. WO2018/224403, PCT Pub. Date Dec. 13, 2018.
Claims priority of application No. 1709006 (GB), filed on Jun. 6, 2017.
Prior Publication US 2020/0168659 A1, May 28, 2020
Int. Cl. H01L 27/146 (2006.01); H01L 21/02 (2006.01); H01L 31/0304 (2006.01); H01L 31/103 (2006.01)
CPC H01L 27/14694 (2013.01) [H01L 21/02068 (2013.01); H01L 27/14614 (2013.01); H01L 27/14649 (2013.01); H01L 27/14689 (2013.01); H01L 31/0304 (2013.01); H01L 31/1035 (2013.01)] 25 Claims
OG exemplary drawing
 
20. A monolithic sensor unit having a sensor integrated with a field-effect transistor, the sensor unit having a layered semiconductor stack comprising:
a substrate;
a first semiconductor device layer forming the field-effect transistor deposited on the substrate;
a second semiconductor device layer deposited on the first semiconductor device layer, the second semiconductor device layer providing an active region for the sensor;
a common contact layer disposed between the first semiconductor device layer and the second semiconductor device layer;
a first contact electrode deposited on a surface of the first semiconductor device layer;
a second contact electrode deposited on a surface of the second semiconductor device layer; and
a gate electrode for the field-effect transistor disposed in a gate recess formed in the first semiconductor device layer,
wherein the field-effect transistor is arranged to control, based on a bias voltage applied to the gate electrode, a current flowing between the first contact electrode and the second contact electrode.