US 11,056,506 B2
Semiconductor device including stack structure and trenches
Seung Hyun Cho, Seoul (KR); Kwang Ho Lee, Hwaseong-si (KR); Ji Hwan Yu, Suwon-si (KR); and Jong Soo Kim, Seoul (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Jun. 2, 2020, as Appl. No. 16/890,400.
Application 16/890,400 is a continuation of application No. 15/941,800, filed on Mar. 30, 2018, granted, now 10,707,229.
Claims priority of application No. 10-2017-0106033 (KR), filed on Aug. 22, 2017.
Prior Publication US 2020/0303412 A1, Sep. 24, 2020
Int. Cl. H01L 27/11582 (2017.01); H01L 27/1157 (2017.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 27/11565 (2017.01)
CPC H01L 27/11582 (2013.01) [H01L 21/76816 (2013.01); H01L 21/76877 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 27/1157 (2013.01); H01L 27/11565 (2013.01)] 19 Claims
OG exemplary drawing
1. A semiconductor device comprising:
a plurality of blocks on a substrate;
a plurality of trenches between the plurality of blocks, the plurality of trenches includes a first trench disposed on an outermost side of the plurality of blocks and a second trench adjacent to the first trench, a lowermost end of the first trench is formed at a level higher than a level of a lowermost end of the second trench; and
a plurality of conductive patterns, wherein respective conductive patterns of the plurality of conductive patterns are formed inside respective trenches of the plurality of trenches, the plurality of conductive patterns includes a first conductive pattern inside the first trench and a second conductive pattern inside the second trench,
wherein the first conductive pattern is insulated from the substrate, the second conductive pattern is connected to the substrate, and
each block of the plurality of blocks includes insulating layers and gate electrodes, which are alternately and repeatedly stacked, and pillars passing through the insulating layers and a first lowest gate electrode of the gate electrodes.