US 11,056,419 B2
Semiconductor device having backside interconnect structure on through substrate via and method of forming the same
Yung-Chi Lin, Su-Lin (TW); Hsin-Yu Chen, Taipei (TW); Ming-Tsu Chung, Hsinchu (TW); HsiaoYun Lo, Hsinchu (TW); Hong-Ye Shih, New Taipei (TW); Chia-Yin Chen, Hsinchu (TW); Ku-Feng Yang, Baoshan Township (TW); Tsang-Jiuh Wu, Hsinchu (TW); and Wen-Chih Chiou, Zhunan Township (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Sep. 13, 2019, as Appl. No. 16/570,777.
Application 16/570,777 is a division of application No. 15/269,753, filed on Sep. 19, 2016, granted, now 10,510,641.
Application 15/269,753 is a division of application No. 13/955,688, filed on Jul. 31, 2013, granted, now 9,449,898, issued on Sep. 20, 2016.
Prior Publication US 2020/0006201 A1, Jan. 2, 2020
Int. Cl. H01L 23/48 (2006.01); H01L 21/768 (2006.01)
CPC H01L 23/481 (2013.01) [H01L 21/76841 (2013.01); H01L 21/76883 (2013.01); H01L 21/76898 (2013.01); H01L 2924/0002 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A method of forming a semiconductor device, the method comprising:
forming a through-substrate via in a substrate;
thinning a backside of the substrate to expose a first end of the through-substrate via, the first end having a convex shape protruding from the backside of the substrate;
forming an isolation film over the backside of the substrate and the first end of the through-substrate via;
removing the isolation film from a topmost surface of the first end of the through-substrate via;
depositing a conductive layer on the isolation film and the topmost surface of the first end of the through-substrate via;
patterning the conductive layer; and
conformally depositing a passivation layer over the conductive layer, and patterning the passivation layer, the patterned passivation layer exposing a portion of the conductive layer over the through-substrate via.